Neuromorphic Hardware MCQs (Multiple-Choice Questions)

1. What is the primary inspiration behind neuromorphic hardware?

1. Traditional database architectures
2. The structure and functioning of biological nervous systems
3. Conventional instruction pipelines only
4. Mechanical control systems

Answer: B) The structure and functioning of biological nervous systems

Explanation:

Neuromorphic hardware takes inspiration from biological neurons, synapses, and neural communication. It implements brain-inspired computing mechanisms in electronic circuits or specialized devices to support neural processing, often with a focus on parallelism and low power consumption.

2. Which component in a neuromorphic system most closely corresponds to a biological neuron?

1. Artificial neuron circuit
2. Hard disk controller
3. File allocation table
4. Instruction cache only

Answer: A) Artificial neuron circuit

Explanation:

An artificial neuron circuit models selected properties of a biological neuron, such as accumulating input signals, maintaining an internal state, and generating an output spike when a threshold is reached. The exact behavior depends on the chosen neuron model and hardware design.

3. What is the role of a synapse in neuromorphic hardware?

1. To store the operating system
2. To regulate communication strength between neural units
3. To manage external network routing exclusively
4. To replace all memory in the computer

Answer: B) To regulate communication strength between neural units

Explanation:

A synapse represents a connection between neural units. Its synaptic weight determines how strongly an input influences a receiving neuron. Hardware synapses may use digital memory, analog circuits, resistive devices, or other technologies to represent these weights.

4. What is a spiking neural network (SNN)?

1. A network that communicates only through database queries
2. A neural network that uses discrete spike events to represent and transmit information
3. A network that processes only static images without computation
4. A processor architecture that prohibits parallel operations

Answer: B) A neural network that uses discrete spike events to represent and transmit information

Explanation:

Spiking neural networks communicate using discrete events called spikes. Information can be encoded through spike timing, frequency, or patterns of activity. SNNs are commonly associated with neuromorphic computing because event-based communication can support sparse and asynchronous processing.

5. Which characteristic is commonly associated with neuromorphic hardware?

1. Strictly sequential execution of every neural operation
2. Event-driven processing and parallel neural computation
3. Mandatory use of mechanical components
4. Exclusive reliance on cloud-based execution

Answer: B) Event-driven processing and parallel neural computation

Explanation:

Many neuromorphic architectures process neural events asynchronously and allow numerous neural units to operate in parallel. These properties can reduce unnecessary activity when inputs are sparse, although the actual performance and energy savings depend on the architecture and workload.

6. What is the main purpose of a spike threshold in a spiking neuron model?

1. To determine when the neuron generates an output spike
2. To specify the size of the processor's hard disk
3. To determine the network's IP address
4. To prevent all input signals from being processed

Answer: A) To determine when the neuron generates an output spike

Explanation:

A spiking neuron typically accumulates input-related changes in its membrane potential or internal state. When this state reaches a specified threshold, the neuron emits a spike. Some models then reset the state and may include a refractory period.

7. Which neuron model is widely used as a computationally simple model for neuromorphic systems?

1. Leaky integrate-and-fire model
2. Relational database model
3. Client-server transaction model
4. Binary search tree model

Answer: A) Leaky integrate-and-fire model

Explanation:

The leaky integrate-and-fire (LIF) model accumulates incoming signals while allowing its internal potential to decay toward a resting level. When the potential reaches a threshold, the model generates a spike. Its relatively simple dynamics make it suitable for many hardware implementations.

8. What does event-driven computation mean in neuromorphic hardware?

1. The system performs every operation at fixed intervals regardless of input
2. The system processes activity in response to events rather than requiring continuous updates everywhere
3. The system stores all data permanently in registers
4. The system can operate only when connected to the internet

Answer: B) The system processes activity in response to events rather than requiring continuous updates everywhere

Explanation:

Event-driven computation allows processing to be triggered by incoming events, such as neural spikes or sensor changes. In suitable workloads, inactive portions of a system may consume less dynamic energy because they do not need to perform continuous computation for every possible input.

9. Which technology is frequently investigated for implementing artificial synapses in neuromorphic hardware?

1. Memristive devices
2. Optical disc drives only
3. Mechanical keyboards
4. Magnetic tape readers only

Answer: A) Memristive devices

Explanation:

Memristive devices can exhibit resistance changes that depend on their electrical history. These state-dependent properties make them promising candidates for representing synaptic weights in compact, potentially nonvolatile hardware. Their practical use depends on factors such as variability, endurance, precision, and fabrication.

10. What is one potential advantage of placing synaptic computation close to synaptic memory?

1. It always eliminates the need for any communication
2. It can reduce data movement between separate processing and memory units
3. It guarantees perfect numerical accuracy
4. It makes every algorithm independent of its hardware

Answer: B) It can reduce data movement between separate processing and memory units

Explanation:

Conventional architectures often move weights and intermediate data between memory and processing units. Integrating computation near or within the memory that stores synaptic weights can reduce some data transfers, potentially lowering energy use and latency for appropriate workloads.

11. How does neuromorphic hardware commonly differ from a conventional CPU?

1. It must execute every operation using a single central instruction stream
2. It may use neural circuits, spike events, and distributed parallel processing as core design principles
3. It cannot contain digital circuits
4. It is designed exclusively for spreadsheet calculations

Answer: B) It may use neural circuits, spike events, and distributed parallel processing as core design principles

Explanation:

A conventional CPU typically executes general-purpose instructions, while neuromorphic hardware is designed around neural computation and brain-inspired communication patterns. Neuromorphic platforms may still include conventional digital processors for configuration, control, and data handling.

12. What does asynchronous communication mean in many neuromorphic architectures?

1. Neural events can be communicated without requiring all units to update on a shared global clock edge
2. Every neuron must communicate at precisely the same time
3. All processing must stop whenever a neuron fires
4. Every event must be stored in a central database first

Answer: A) Neural events can be communicated without requiring all units to update on a shared global clock edge

Explanation:

Asynchronous systems allow events to propagate when they occur rather than relying on a global clock for every operation. This approach can suit sparse neural activity, but it introduces design challenges involving communication delays, synchronization, and event routing.

13. What is the function of a neural spike router in a digital neuromorphic system?

1. To translate source code into a programming language
2. To deliver spike events to the appropriate destination neurons or processing cores
3. To cool the system using liquid circulation
4. To convert every spike into a permanent file

Answer: B) To deliver spike events to the appropriate destination neurons or processing cores

Explanation:

A spike router manages the communication of neural events across a neuromorphic chip or network. It uses routing information to deliver events to their destinations. Routing capacity, network congestion, and communication overhead can affect overall performance.

14. What is a major reason for exploring neuromorphic hardware for edge AI?

1. To require continuous high-bandwidth communication with a remote server
2. To potentially perform selected intelligent tasks locally with low power consumption
3. To remove the need for all sensors
4. To guarantee that every AI model will run faster

Answer: B) To potentially perform selected intelligent tasks locally with low power consumption

Explanation:

Edge devices often operate under strict power, latency, and connectivity constraints. Neuromorphic processors can be useful for selected event-driven workloads, such as sensor processing and always-on detection. Benefits are application-dependent and are not guaranteed for every AI model.

15. Which sensor type naturally produces event-based information that can be suitable for neuromorphic processing?

1. Event-based vision sensor
2. Conventional printer spooler
3. Static file directory
4. Audio amplifier with no output interface

Answer: A) Event-based vision sensor

Explanation:

An event-based vision sensor reports changes in brightness at individual pixels rather than producing only conventional full-frame images. Its asynchronous output can pair well with spike-based or event-driven processors, particularly in applications involving fast motion and sparse visual changes.

16. What does synaptic plasticity refer to in neuromorphic computing?

1. The physical bending of a processor board
2. The ability to change synaptic connection strengths based on activity or learning rules
3. The permanent disabling of all neural connections
4. The process of increasing the screen resolution

Answer: B) The ability to change synaptic connection strengths based on activity or learning rules

Explanation:

Synaptic plasticity describes changes in the strength of connections between neurons. Neuromorphic systems may support plasticity through software-managed weight updates, digital learning circuits, analog device behavior, or specialized local learning mechanisms.

17. What is spike-timing-dependent plasticity (STDP)?

1. A method for arranging processor cores by physical size
2. A learning rule in which synaptic changes depend on the relative timing of pre-synaptic and post-synaptic spikes
3. A technique for increasing storage capacity through compression
4. A network protocol for transferring web pages

Answer: B) A learning rule in which synaptic changes depend on the relative timing of pre-synaptic and post-synaptic spikes

Explanation:

STDP adjusts synaptic strength according to the relative timing of activity at connected neurons. In common formulations, the order and time difference between pre-synaptic and post-synaptic spikes influence whether a connection is strengthened or weakened. Specific learning rules may use different timing windows.

18. What is a common challenge when using analog circuits to represent synaptic weights?

1. Analog values cannot represent any variation
2. Noise, device mismatch, and limited precision can affect stored weights
3. Analog circuits can only store text files
4. Analog implementations cannot perform electrical computation

Answer: B) Noise, device mismatch, and limited precision can affect stored weights

Explanation:

Analog circuits can represent continuous or multilevel values, but physical variations, noise, temperature changes, and component mismatch may cause deviations from intended weights. Neuromorphic designs must account for these nonidealities through circuit design, calibration, training, or error-tolerant models.

19. Which statement best describes digital neuromorphic hardware?

1. It must use biological neurons extracted from living tissue
2. It implements neural computation using digital logic and digital representations of neural state
3. It cannot support parallel processing
4. It works only with mechanical relays

Answer: B) It implements neural computation using digital logic and digital representations of neural state

Explanation:

Digital neuromorphic systems implement neuron models, synaptic operations, and spike communication using digital circuits. Digital designs can offer reproducible state representation and programmability, although their energy, speed, and resource use depend on the implementation and workload.

20. What is a potential benefit of analog neuromorphic circuits?

1. They can exploit circuit dynamics to model certain neural behaviors with low energy use
2. They guarantee unlimited precision under all operating conditions
3. They eliminate the need for circuit design
4. They cannot process time-dependent signals

Answer: A) They can exploit circuit dynamics to model certain neural behaviors with low energy use

Explanation:

Analog circuits can use electrical quantities such as currents and voltages to represent neural states and interactions. For certain models, the physical behavior of the circuit can perform part of the computation directly. However, noise, variability, and limited precision must be considered.

21. What is a mixed-signal neuromorphic system?

1. A system that combines analog and digital circuit techniques
2. A system that supports only digital text input
3. A computer that uses no electronic components
4. A system that replaces neural computation with database indexing

Answer: A) A system that combines analog and digital circuit techniques

Explanation:

Mixed-signal neuromorphic systems use analog circuits for some neural dynamics or synaptic operations and digital circuits for functions such as event routing, control, configuration, and data handling. This combination allows designers to balance energy use, precision, flexibility, and implementation complexity.

22. What is the primary purpose of a refractory period in a spiking neuron model?

1. To temporarily restrict or reduce the neuron's ability to generate another spike
2. To permanently delete the neuron's synaptic weights
3. To increase the number of processor instructions
4. To route all spikes to a single output

Answer: A) To temporarily restrict or reduce the neuron's ability to generate another spike

Explanation:

A refractory period models the temporary reduction in a biological neuron's ability to fire again after a spike. In hardware neuron models, this behavior can be implemented as a timer or state constraint that limits spike generation for a specified interval.

23. Which organization of computing resources is common in neuromorphic architectures?

1. Distributed neural processing units connected through event communication
2. A single storage device that performs every operation
3. Independent components with no means of communication
4. A graphics display used as the only computational element

Answer: A) Distributed neural processing units connected through event communication

Explanation:

Many neuromorphic architectures distribute neurons and synapses across multiple cores or processing regions. Communication networks transfer spike events between them. This organization can support parallel neural computation, though mapping and routing large networks remain important engineering challenges.

24. Which factor can limit the scalability of a large neuromorphic network?

1. The number of descriptive labels in a tutorial
2. Routing bandwidth and communication overhead between neural processing units
3. The physical length of a source-code comment
4. The number of desktop icons

Answer: B) Routing bandwidth and communication overhead between neural processing units

Explanation:

As a neural network grows, the number of connections and the volume of spike traffic may increase. Limited routing bandwidth, congestion, communication latency, and energy costs can constrain scalability. Architecture design and network mapping help manage these limitations.

25. What does sparse neural activity mean?

1. Every neuron fires continuously at the maximum possible rate
2. Only a relatively small fraction of neurons or connections are active at a given time
3. No neuron can receive an input
4. Every synaptic weight must be zero

Answer: B) Only a relatively small fraction of neurons or connections are active at a given time

Explanation:

Sparse activity occurs when relatively few neurons or connections participate in computation at a particular moment. Event-driven neuromorphic systems can benefit from such patterns because they may avoid unnecessary operations on inactive elements.

26. Why is energy per synaptic operation an important metric for neuromorphic hardware?

1. It measures the color quality of a display
2. It estimates the energy required to perform a synaptic computation or update
3. It indicates the number of installed operating systems
4. It measures only the physical weight of the processor

Answer: B) It estimates the energy required to perform a synaptic computation or update

Explanation:

Energy per synaptic operation helps characterize the cost of neural computation at a fine-grained level. However, meaningful system comparisons should also consider spike routing, memory access, idle power, input/output, learning operations, and the actual task being performed.

27. What is a major role of on-chip memory in neuromorphic processors?

1. To store neural states, synaptic weights, or configuration data close to processing circuits
2. To replace all sensor hardware
3. To guarantee an unlimited number of neurons
4. To provide physical cooling without additional hardware

Answer: A) To store neural states, synaptic weights, or configuration data close to processing circuits

Explanation:

On-chip memory can store synaptic weights, neuron parameters, connection tables, and other neural state information. Keeping these values close to processing resources can reduce some communication costs, but available memory capacity may limit network size or the precision of stored parameters.

28. Which application is a plausible use case for neuromorphic hardware?

1. Real-time event-based sensory processing on a battery-powered robot
2. Replacing every form of archival storage without evaluation
3. Guaranteeing exact results for every symbolic mathematics problem
4. Eliminating the need for all software

Answer: A) Real-time event-based sensory processing on a battery-powered robot

Explanation:

Robotics can involve continuous streams of sensory events, tight response deadlines, and limited energy budgets. Neuromorphic hardware may support selected perception and control tasks in such settings, especially when event-based inputs and sparse processing are appropriate.

29. What is one important difference between conventional frame-based vision and event-based vision?

1. Event-based vision can report pixel-level changes asynchronously rather than relying only on fixed-rate full frames
2. Event-based vision cannot detect motion
3. Frame-based vision never uses digital sensors
4. Event-based vision always produces a complete color image at every event

Answer: A) Event-based vision can report pixel-level changes asynchronously rather than relying only on fixed-rate full frames

Explanation:

Frame-based cameras typically output images at specified frame intervals. Event-based sensors instead report changes in brightness at individual pixels as events occur. This can offer high temporal resolution and reduce redundant data for some scenes, although event streams may require specialized processing methods.

30. What does hardware-software co-design mean in neuromorphic computing?

1. Designing the hardware and neural algorithms together to meet system requirements
2. Writing software without considering hardware constraints
3. Using only one programming language for all applications
4. Removing all testing from the development process

Answer: A) Designing the hardware and neural algorithms together to meet system requirements

Explanation:

Hardware-software co-design considers how neural models, learning methods, mapping strategies, and circuit architecture affect one another. This is important because a model that performs well in software may need adjustments to fit hardware limits involving memory, connectivity, numerical precision, or supported neuron dynamics.

31. Which programming approach is commonly used to configure neuromorphic systems?

1. Defining neural networks, neuron parameters, synaptic connections, and execution settings using supported tools or APIs
2. Editing only the physical circuit board by hand for every input
3. Using spreadsheet formulas as the sole control mechanism on every platform
4. Disabling all configuration interfaces

Answer: A) Defining neural networks, neuron parameters, synaptic connections, and execution settings using supported tools or APIs

Explanation:

Neuromorphic platforms commonly provide software tools, libraries, APIs, or specialized languages for describing neural models and mapping them onto hardware. The exact programming workflow varies between platforms, and some systems support more flexible configuration than others.

32. Why might a neural network need to be mapped onto specific neuromorphic cores?

1. To assign neurons and synapses to available hardware resources while respecting architecture constraints
2. To convert all neural connections into physical network cables
3. To remove every synaptic weight from the model
4. To prevent communication between cores

Answer: A) To assign neurons and synapses to available hardware resources while respecting architecture constraints

Explanation:

Mapping assigns a neural model's components to physical processing cores, memory resources, and communication routes. Effective mapping must account for core capacity, connectivity, traffic patterns, and execution requirements. Poor mapping can increase communication overhead or prevent a network from fitting on the device.

33. What is a common challenge in training spiking neural networks for neuromorphic deployment?

1. Every spike is a continuously differentiable signal by definition
2. The discrete spike-generation operation can complicate gradient-based optimization
3. Spiking networks cannot contain adjustable weights
4. Training always requires a mechanical actuator

Answer: B) The discrete spike-generation operation can complicate gradient-based optimization

Explanation:

Spike generation is commonly modeled as a threshold-based event, which is not differentiable in the usual sense at the threshold. Training methods address this issue through techniques such as surrogate gradients, conversion from artificial neural networks, or learning rules designed specifically for spike-based computation.

34. What is surrogate-gradient learning in spiking neural networks?

1. A method that uses an approximate derivative during gradient-based training of spike-based models
2. A hardware repair technique for damaged memory chips
3. A method for removing every nonlinear operation from a network
4. A technique for routing internet packets

Answer: A) A method that uses an approximate derivative during gradient-based training of spike-based models

Explanation:

Surrogate-gradient methods replace the unavailable or unsuitable derivative of a spike threshold with a smooth approximation during backpropagation. The forward pass can still use discrete spikes, while the approximate gradient enables optimization of network parameters.

35. What is the purpose of a reset mechanism in a leaky integrate-and-fire neuron?

1. To update the network's internet connection
2. To adjust the neuron's internal potential after a spike according to the model's rules
3. To delete every synapse in the network
4. To permanently stop the neuron from receiving input

Answer: B) To adjust the neuron's internal potential after a spike according to the model's rules

Explanation:

After a spike, a LIF neuron often resets its membrane potential to a resting value or subtracts a specified amount from it. This mechanism helps model repeated firing and shapes how incoming signals influence the timing of subsequent spikes.

36. Which property makes nonvolatile memory attractive for some neuromorphic synapse implementations?

1. It loses its state immediately when power is removed
2. It can retain stored information without continuous power
3. It cannot represent different weight values
4. It must refresh every value on every clock cycle

Answer: B) It can retain stored information without continuous power

Explanation:

Nonvolatile memory retains information when power is removed. When used to represent synaptic weights, this property may reduce the need to reload learned parameters after shutdown. Actual benefits depend on device endurance, retention, write energy, precision, and integration requirements.

37. What does in-memory computing attempt to achieve in neuromorphic hardware?

1. Performing selected computations within or near the memory that stores relevant data
2. Moving every value to a distant server before each operation
3. Preventing memory from storing synaptic weights
4. Replacing all computation with file compression

Answer: A) Performing selected computations within or near the memory that stores relevant data

Explanation:

In-memory computing reduces the need to transfer data between separate memory and processing units by performing certain operations within or close to the storage medium. For neuromorphic systems, this approach may accelerate or reduce the energy cost of selected synaptic operations.

38. Which limitation should be considered when using memristive devices for synaptic weights?

1. They are guaranteed to have identical switching behavior across every device
2. Device variability, endurance, and programming precision can affect performance
3. They cannot exhibit state-dependent resistance
4. They work only as mechanical switches

Answer: B) Device variability, endurance, and programming precision can affect performance

Explanation:

Memristive devices may exhibit variations in switching behavior, resistance levels, retention, and endurance. These factors can make accurate and repeatable weight programming difficult. Practical implementations may use calibration, redundancy, closed-loop programming, or algorithms tolerant of device variation.

39. What is the primary goal of a low-power neuromorphic processor for wearable devices?

1. To maximize unnecessary background computation
2. To perform suitable neural tasks within strict energy and response-time constraints
3. To require a desktop workstation for every sensor reading
4. To disable real-time sensing

Answer: B) To perform suitable neural tasks within strict energy and response-time constraints

Explanation:

Wearable devices often rely on batteries and need timely responses to sensor inputs. A low-power neuromorphic processor may help with continuous monitoring, gesture recognition, or event detection when its architecture and neural model fit the task's requirements.

40. How can neuromorphic hardware support autonomous robotics?

1. By enabling selected sensor-processing and control functions to react to incoming events
2. By guaranteeing that a robot never needs a control algorithm
3. By replacing all mechanical components with neural spikes
4. By requiring every action to be approved by a remote server

Answer: A) By enabling selected sensor-processing and control functions to react to incoming events

Explanation:

Neuromorphic systems can process event-based sensory data and support low-latency responses for selected robotic tasks. They may contribute to perception, navigation, or motor control, but a complete robot still requires suitable sensors, actuators, control logic, safety mechanisms, and system integration.

41. What is a key difference between rate coding and temporal coding in spiking neural networks?

1. Rate coding relies on spike frequency, while temporal coding uses the timing or temporal pattern of spikes
2. Rate coding stores data only in hard disks, while temporal coding uses databases
3. Both methods prohibit the use of spikes
4. Temporal coding requires every neuron to fire at the same frequency

Answer: A) Rate coding relies on spike frequency, while temporal coding uses the timing or temporal pattern of spikes

Explanation:

Rate coding represents information through the number or frequency of spikes over a time interval. Temporal coding uses the precise timing, order, or pattern of spikes. Different SNN models and applications may rely on one approach or combine both.

42. What does neural state refer to in a neuromorphic processor?

1. Only the external temperature of the device
2. Internal variables that describe the current condition of a neuron or neural unit
3. The physical location of the computer in a building
4. The list of applications installed on the host operating system

Answer: B) Internal variables that describe the current condition of a neuron or neural unit

Explanation:

Neural state can include membrane potential, adaptation variables, refractory counters, and other model-specific quantities. The processor updates these variables as neural inputs and events arrive, using the rules implemented by the selected neuron model.

43. Why is reproducibility important when evaluating neuromorphic hardware?

1. It ensures that all hardware architectures must be physically identical
2. It helps researchers compare results under clearly defined models, workloads, and measurement conditions
3. It removes the need to measure energy consumption
4. It guarantees that all algorithms produce the same accuracy

Answer: B) It helps researchers compare results under clearly defined models, workloads, and measurement conditions

Explanation:

Neuromorphic performance depends on factors such as model parameters, event rates, network mapping, software tools, measurement boundaries, and hardware configuration. Reproducible experiments make it easier to interpret reported latency, energy, throughput, and accuracy results.

44. Which metric is especially relevant when evaluating a neuromorphic system for time-critical applications?

1. Response latency from input event to output
2. The number of characters in the device name
3. The number of folders on the host computer
4. The color of the processor package

Answer: A) Response latency from input event to output

Explanation:

Latency measures how long a system takes to respond to an input. For robotics, sensory processing, and real-time detection, low latency may be essential. Evaluation should also consider latency variation, accuracy, energy use, and the time required for input and output communication.

45. Which statement about neuromorphic hardware and artificial neural networks is correct?

1. All artificial neural networks must run on neuromorphic hardware
2. Neuromorphic hardware can implement neural models, including spiking networks, but is not required for all neural-network computation
3. Neuromorphic hardware cannot implement learned models
4. Artificial neural networks never use weighted connections

Answer: B) Neuromorphic hardware can implement neural models, including spiking networks, but is not required for all neural-network computation

Explanation:

Artificial neural networks can run on CPUs, GPUs, accelerators, and other platforms. Neuromorphic hardware offers specialized approaches to neural computation, often emphasizing spike-based processing or brain-inspired architecture. Whether it is the best choice depends on the model, workload, and performance goals.

46. What is a major consideration when converting a conventional neural network to a spiking neural network?

1. Maintaining an appropriate balance between task accuracy, spike activity, and hardware constraints
2. Ensuring that every neuron fires at the maximum possible frequency
3. Removing every connection weight from the model
4. Making the network independent of its input data

Answer: A) Maintaining an appropriate balance between task accuracy, spike activity, and hardware constraints

Explanation:

Conversion methods may translate conventional activations into spike rates or related temporal representations. The resulting SNN must preserve sufficient accuracy while controlling spike counts, latency, and hardware resource use. Conversion quality depends on the original network, conversion method, and target device.

47. Why can fixed-point arithmetic be useful in digital neuromorphic hardware?

1. It can reduce hardware complexity and resource use compared with some floating-point implementations
2. It guarantees infinite numerical precision
3. It removes the need for all neural state variables
4. It prevents digital circuits from performing addition

Answer: A) It can reduce hardware complexity and resource use compared with some floating-point implementations

Explanation:

Fixed-point arithmetic represents numerical values using a defined scaling and a finite number of bits. It can support compact, low-power arithmetic circuits, but introduces quantization and range limitations. The required precision must be evaluated against the neural model's accuracy and stability requirements.

48. What is one important challenge in implementing on-chip learning in neuromorphic hardware?

1. Managing the computational, memory, and energy costs of weight updates
2. Preventing all changes to synaptic weights under every condition
3. Ensuring that the system cannot receive training signals
4. Eliminating the need for any learning rule

Answer: A) Managing the computational, memory, and energy costs of weight updates

Explanation:

On-chip learning allows a system to adapt its synaptic weights on the device. However, learning may require additional state, arithmetic, memory writes, and control logic. The design must balance adaptation capability with power consumption, device endurance, stability, and available hardware resources.

49. Which statement best describes the relationship between neuromorphic hardware and conventional computing systems?

1. Neuromorphic hardware must replace every CPU and GPU in all applications
2. Neuromorphic hardware can complement conventional processors by accelerating selected brain-inspired workloads
3. Conventional processors cannot communicate with neuromorphic systems
4. Neuromorphic hardware is useful only for storing files

Answer: B) Neuromorphic hardware can complement conventional processors by accelerating selected brain-inspired workloads

Explanation:

Neuromorphic processors are specialized computing resources rather than universal replacements for conventional processors. A system may use a CPU for general control, a GPU for conventional neural-network operations, and a neuromorphic chip for selected event-driven tasks. The division of work depends on application requirements and system integration.

50. A digital neuromorphic processor receives 2,000 input spikes per second. Each input spike causes an average of 4 synaptic operations, and each synaptic operation consumes 5 nanojoules. Assuming all triggered operations are counted and ignoring routing, idle power, and other overheads, what is the energy consumed by these synaptic operations in one second?

1. 10 microjoules
2. 20 microjoules
3. 40 microjoules
4. 40 millijoules

Answer: C) 40 microjoules

Explanation:

The processor receives 2,000 input spikes per second, and each spike triggers an average of 4 synaptic operations.

Total synaptic operations per second = 2,000 × 4 = 8,000 operations.

Each operation consumes 5 nanojoules.

Energy consumed in one second = 8,000 × 5 nJ = 40,000 nJ.

Since 1,000 nJ = 1 microjoule, 40,000 nJ = 40 microjoules.

Therefore, the synaptic operations consume 40 microjoules in one second, equivalent to an average power of 40 microwatts for these operations alone. Routing, idle power, input/output, and other overheads are excluded from this calculation.