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Computer Science Organization | Input and Output Transfer Mode

In this article, we are going to learn about the introduction of input output data transfer mode and the types of data transfer mode in computer science and organization.
Submitted by Prerana Jain, on July 08, 2018

Input output transfer mode

There are three kinds of transfer mode present to transfer the data from input out devices to other components of the computer system.

  1. Programmed IO
  2. Interrupt initiated I/O
  3. Direct Memory access

1) Programmed I/O

In this mode, input-output devices are directly connected with the system BUS that means no interface is used between the CPU and Input-output devices. Therefore the CPU performed will be degraded. In this mode CPU time is directly depending on the speed of the input-output devices that means until completion of an IO operation processor is there is waiting for the state.

When the 1 KBPS device is connected to the CPU in the programmed IO mode to transfer the data byte by byte. Once byte transfer takes 1 millisecond, therefore, processor time will be wasted.

2) Interrupt Initiated I/O

In this mode, high-speed interface is used between the CPU and IO devices. Therefore processor utilization is efficient. In this mode, the CPU time is depending on the latency of the interface rather than the speed of the input-output devices.

In this mode, the interrupt controller is used as the high-speed interface logic to control the IO devices operation. Interrupt controller is a programmable interface so in the single mode configuration 8 IO devices are possible and in the cascading mode configuration maximum 64 IO devices are connected to the CPU by using the interrupt controller interface.

3) DMA (Direct Memory Access)

In this mode bulk amount of data is transferred from the IO to main memory without the involvement of the CPU. When the user program capacity is greater than the main memory capacity then there is a need for increasing the address space.

Virtual memory concept is used to increase the address space that means using the secondary storage component to store the user program. Secondary storage components are connected to DMA modules. Therefore to execute the user program there is a need to transfer the bulk amount of data from the input-output devices (secondary memory) to main memory through DMA. CPU initiates the DMA module along with the IO address memory address, control signals and count value later CPU is busy with another task.

Direct memory access logic interrupts the request and enables the corresponding port for the respective operation.

Based on the speed of the disk it prepares the required data. When the data is available in the buffer then DMA enables the hold signal to gain the control of the bus and waiting for the HLDA signals. After receiving the acknowledgment DMA transfers the bulk amount of data to main memory without the involvement of the CPU until the count becomes zero. After the DMA operation, it re-establish the bus connection to the CPU.

In the DMA operation CPU is present in two states:

  • Busy state
  • Blocked state

CPU is in a busy state until preparing the data therefore busy time is depending on the preparation time of the data. Preparation time is depending on the speed of the disk.

CPU is blocked until transferring the data so block time is depending on the transfer time. Transfer time is depending on the Main memory latency.

DMA is operated in mainly three modes,

  1. Burst mode
    In the burst mode of DMA after receiving the HLDA signal bulk amount of data is transferred to main memory.
  2. Cycle stealing mode
    In the cycle stealing mode of DMA before receiving the HLDA signal it forcefully suspends the CPU operation and gains the control of the bus. To transfer a few bytes of the data.
  3. Block mode
    In the locked mode of DMA after receiving HLDA signal data is transferred to main memory blocked buses.

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