# Race Around Condition in JK Flip Flop and T-Flip Flop

In this article, we are going to discuss in detail about the issues that occur in JK Flip Flop which is known as **Race Around Condition**. Also, we will be discussing the concept of T-Flip Flop in digital electronics. The construction and working of T-flip flop its applications.

Submitted by Saurabh Gupta, on February 07, 2021

## Race Around Condition

Although, JK flip-flop resolves the invalid state condition of **SR** flip flop, which occurs when Set and Reset are both set to 1. There arises a new problem in **JK** flip flop, when **J** and **K** inputs of the **JK** flip flop are provided with high input i.e., 1, then output continuously toggles into that region (output changes either from 0 to 1 or from 1 to 0, which creates a disturbance in output. This situation is referred to as the race around the condition.

## How can we eliminate race around condition?

There are three ways using which we can eliminate the race around condition in **JK** flip flop, which are discussed below:

- Race around condition exists when
**t**_{p}**≥ Δt**. Thus, by keeping**t**, we can avoid race around condition._{p}< Δt - Use of edge triggering in flip flops.
- By using a master-slave flip-flop.

## T-Flip Flop

**T-flip flop** is a modification of the **JK** flip flop. When we join both **J** and **K** inputs of the JK-flip flop, then a T-flip flop is formed. The '**T**' in T-flip flop stands for **Toggle**. Logic diagram of a positive edge-triggered T-flip flop is represented as:

## Construction of T-Flip Flop

As already discussed, it is formed using joining both the inputs of JK-flip flop to make it a single input T. The logic circuit diagram of T-flip flop is drawn as:

From the above given logic circuit, the truth table of the T-flip flop can be given as:

## Working of T-Flip Flop

T-flip flop has only two options either has low state (0) or high state (1).

**Case 1:** When T=0, the flip flop remains in-store mode that means whatever output was obtained in the previous state the same output will be generated in the next state, i.e., there is **no change in output.**

**Case 2:** When T=1, the flip flop remains in toggle state/complement mode that means it gives complemented output of the previous state value as the **output in the next state.**

Input and output waveforms of a positive edge-triggered T-flip flop can be drawn as:

Also, from the above given truth table we can derive the characteristic table of T-flip flop as:

Also, the characteristic equation can be derived using the K-Map as:

**Q _{n+1} = T'Q_{n} + TQ_{n}'**

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